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SmartDV is one of the worlds' leaders in Verification IP development. Company offers blocks for most of the standard buses and interfaces. Test environment written in OpenVera, Verilog, SystemC, SystemVerilog and compatible with most popular verification methodologies: RVM, AVM, VMM, OVM, UVM.
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  • About the company
    About the company
    SmartDV Technologies India Private Limited was started in August 2007 by Durga Lakshmi Sangisetti, Deepak Kumar Tala and Kavitha Tala. Together we have more than 30 years experience in design and verification of complex ASICs. The staff consultants are among the best and brightest minds in the industry. We maintain our leadership by continuously staying atop the latest technology advances and bringing that information to our clients. Our biggest strength is ability to automate writing of verification environment and testcases for ASIC verification to save huge time it takes to verify ASICs.
MIPI Verification IP
MIPI is a set of standards promoted by MIPI Alliance. This organization sponsored by companies developing mobile devices and it controls specifications for mobile interfaces. SmartDV is a member of MIPI Alliance from 2010. It delivers IP compatible with standards right after changes aproved for this standards. Company has wide range of verification IPs for MIPI M-PHY, DigRF, UniPro and many others. VIPs allow to verify not only digital blocks but also interfaces with analog blocks. Test environment delivered as source code for given logic simulator.
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Networking and SoC VIP
Network interfaces and SoC VIPs allow to check functionality of Ethernet, USB, AMBA (APB, AHB, AXI), Wishbone and other. ARM processors are widely used in electronic devices all over the world from calculators to smartphones. Big set of available software and hardware compatible with ARM allows build ARM-based system in a short timeframe. Verification of such system and it's components can be simplified dramatically when VIP used.
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Automotive and Serial Bus Verification IP
Automotive widely uses interfaces CAN and I2C which can be verified using SmartDV verificaiotn IPs. Specific applications like SpaceWire and MIL Std 1553 or serial interfaces SPI, UART, I2S, JTAG can also be verified using SmartDVs' VIPs. Any embedded system requires control and programming interface. Compliance with a standards can define application area of developed design. Protocl verification should be done as early as possible in a design flow before software and PCB design. Incomplete checking can impact no only design but all system functionality. For example I2C bus can be blocked by improperly working device. Other example is a JTAG programmers which can corrupt configuration data inside devices' flash memory.
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Storage and Misc Verification IP
SmartDV offers set of VIPs for verification high-speed memory interfaces (PCI Express, SATA, DDR 2/3) or relative slow flash interfaces (ONFI, Serial Flash). PCI Express, SATA and DDR used almost at all modern PCs and notebooks delivering high-speed access to memory, disks, andxetension boards. Any PC-oriented design should has at least one of specified interfaces which should be verified. SmartDVs' verification IP allow to reduce time-tomarket dramatically.
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